DEVICE_CTRL register controls the transfer properties and disposition of controllers capabilities.
| REG_BA_INCLUDE | This bit is used to include I3C broadcast address(0x7E) for private transfer.(If I3C broadcast address is not include for the private transfer, In-Band Interrupts driven from Slaves may not win address arbitration. Hence IBIs will get delayed) |
| REG_TRANS_START | Transfer Start |
| REG_CLK_EN | NA |
| REG_IBI_RSTART_TRANS_EN | NA |
| REG_AUTO_DIS_IBI_EN | NA |
| REG_DMA_RX_EN | NA |
| REG_DMA_TX_EN | NA |
| REG_MULTI_SLV_SINGLE_CCC_EN | 0: rx high bit first, 1: rx low bit first |
| REG_RX_BIT_ORDER | 0: rx low byte fist, 1: rx high byte first |
| REG_RX_BYTE_ORDER | NA |
| REG_SCL_PULLUP_FORCE_EN | This bit is used to force scl_pullup_en |
| REG_SCL_OE_FORCE_EN | This bit is used to force scl_oe |
| REG_SDA_PP_RD_PULLUP_EN | NA |
| REG_SDA_RD_TBIT_HLVL_PULLUP_EN | NA |
| REG_SDA_PP_WR_PULLUP_EN | NA |
| REG_DATA_BYTE_CNT_UNLATCH | 1: read current real-time updated value 0: read latch data byte cnt value |
| REG_MEM_CLK_FORCE_ON | 1: dev characteristic and address table memory clk date force on . 0 : clock gating by rd/wr. |